diff --git a/Documents/CH32L103DS0.PDF b/Documents/CH32L103DS0.PDF new file mode 100644 index 0000000..3c7e426 Binary files /dev/null and b/Documents/CH32L103DS0.PDF differ diff --git a/Documents/CH32L103RM.PDF b/Documents/CH32L103RM.PDF new file mode 100644 index 0000000..6a1a688 Binary files /dev/null and b/Documents/CH32L103RM.PDF differ diff --git a/Documents/CH334DS1.PDF b/Documents/CH334DS1.PDF new file mode 100644 index 0000000..b120157 Binary files /dev/null and b/Documents/CH334DS1.PDF differ diff --git a/Documents/README.md b/Documents/README.md new file mode 100644 index 0000000..8cc4b56 --- /dev/null +++ b/Documents/README.md @@ -0,0 +1,17 @@ +# Datasheets in use + +Only the parts this design actually depends on. The wider WCH collection — +including the CH32X035 and CH32V203 docs used to rule out crystal-less USB — +lives in `~/Documents/Projects/WCH CH ICs/`. + +| File | Part | Why it's here | +|---|---|---| +| `CH32L103DS0.PDF` | CH32L103C8T6 | The MCU. Pinout, 64 K flash / 20 K SRAM, HSI accuracy table (§3.3.6), USBFS with 8 device endpoints (§1.4.20). | +| `CH32L103RM.PDF` | CH32L103C8T6 | Reference manual. USB clock path (§3.3.5.6), `RB_UC_DEV_PU_EN` internal 1.5 kΩ D+ pull-up, HSICAL/HSITRIM. | +| `CH334DS1.PDF` | CH334R | The hub. Variant feature table (which packages expose `PSELF` and port power switching), crystal-free caveats (§6.2), and the CH213 reference design for VBUS protection. | + +## Missing + +- **STM32F103C8T6 datasheet** — the pin-compatible escape-hatch MCU. ST's site + refused automated download; grab it from st.com or the LCSC CDN and drop it + here. Needed to do the pin-number overlay flagged in the top-level README.