Verify the L103/F103 pin overlay: all 48 identical

Parsed the pin-definition tables out of both datasheets - Table 2-1-1 (CH32L103,
C8T6 column) and Table 2 (STM32F103, LQFP48 column) - and diffed them pin by
pin. Zero mismatches, including OSC_IN/OSC_OUT, NRST, PA11/PA12 for USB,
PA13/PA14 for SWD, and BOOT0. Power pins differ only in naming.

This was the one unverified assumption the whole project rested on: three
boards laid out to a footprint that has to accept either MCU. It holds.

Full table recorded in Documents/pinout-L103-vs-F103.md.

Co-Authored-By: Claude Opus 5 <noreply@anthropic.com>
This commit is contained in:
William Rickert
2026-09-01 10:42:07 -05:00
co-authored by Claude Opus 5
parent 04a52b1eea
commit 49ad7e97cf
3 changed files with 70 additions and 7 deletions
+6 -4
View File
@@ -96,10 +96,12 @@ L103 is pin-compatible with (same LQFP-48, `PC13`/`PC14`/`PC15`, `PD0`/`PD1` as
Populate the F103 and it works with stock QMK today; populate the L103 when the
port lands. Same board either way.
> ⚠️ **Unverified assumption the whole board rests on:** pin *names and functions*
> were confirmed identical from both datasheets, but the pin *numbering* was not —
> the PDFs interleave four packages and extract badly. **Overlay the two pinout
> drawings before routing.**
> **Verified 2026-09-01: all 48 pins identical, zero mismatches.** Both
> datasheets' pin-definition tables were parsed and diffed pin by pin — including
> `OSC_IN`/`OSC_OUT`, `NRST`, `PA11`/`PA12` (USB), `PA13`/`PA14` (SWD) and
> `BOOT0`. Power pins differ only in naming (`VSS` vs `VSS_1..3`). Full table:
> [`Documents/pinout-L103-vs-F103.md`](Documents/pinout-L103-vs-F103.md).
> This was the one assumption the whole project rested on. It holds.
**Only one component differs between the two MCUs:** `R5`, a 1.5 kΩ pull-up on
D+. The F103 has no internal one. The L103 does (~1.5 kΩ, enabled via