# CH32L103C8T6 vs STM32F103C8T6 — LQFP-48 pin overlay

**Result: all 48 pins identical. Zero mismatches.**

Verified 2026-09-01 by parsing the pin-definition tables out of both datasheets
in `Documents/` — Table 2-1-1 (CH32L103, C8T6 column) and Table 2 (STM32F103,
LQFP48 column) — and diffing them pin by pin. This is the assumption the whole
project rests on: the boards are laid out to this footprint so either MCU can be
populated.

Every pin below carries the same signal on both parts.

| # | Signal | | # | Signal | |
|---|---|---|---|---|---|
| 1 | `VBAT` |  | 25 | `PB12` |  |
| 2 | `PC13` |  | 26 | `PB13` |  |
| 3 | `PC14` |  | 27 | `PB14` |  |
| 4 | `PC15` |  | 28 | `PB15` |  |
| 5 | `OSC_IN` | crystal | 29 | `PA8` |  |
| 6 | `OSC_OUT` | crystal | 30 | `PA9` |  |
| 7 | `NRST` | reset | 31 | `PA10` |  |
| 8 | `VSSA` |  | 32 | `PA11` | USB D− |
| 9 | `VDDA` |  | 33 | `PA12` | USB D+ |
| 10 | `PA0` |  | 34 | `PA13` | SWDIO |
| 11 | `PA1` |  | 35 | `VSS_2` |  |
| 12 | `PA2` |  | 36 | `VDD_2` |  |
| 13 | `PA3` |  | 37 | `PA14` | SWCLK |
| 14 | `PA4` |  | 38 | `PA15` |  |
| 15 | `PA5` |  | 39 | `PB3` |  |
| 16 | `PA6` |  | 40 | `PB4` |  |
| 17 | `PA7` |  | 41 | `PB5` |  |
| 18 | `PB0` |  | 42 | `PB6` |  |
| 19 | `PB1` |  | 43 | `PB7` |  |
| 20 | `PB2` | BOOT1 | 44 | `BOOT0` | BOOT0 |
| 21 | `PB10` |  | 45 | `PB8` |  |
| 22 | `PB11` |  | 46 | `PB9` |  |
| 23 | `VSS_1` |  | 47 | `VSS_3` |  |
| 24 | `VDD_1` |  | 48 | `VDD_3` |  |

## The nine that actually matter

| Pin | Signal | Why |
|---|---|---|
| 5 / 6 | `OSC_IN` / `OSC_OUT` | 8 MHz crystal — both parts, same pins |
| 7 | `NRST` | reset |
| 20 | `PB2` | BOOT1 |
| 32 / 33 | `PA11` / `PA12` | USB D− / D+ |
| 34 / 37 | `PA13` / `PA14` | SWDIO / SWCLK |
| 44 | `BOOT0` | boot select |

## Caveats

- Power pins differ only in **naming**: the L103 labels them `VSS`/`VDD`, the
  F103 numbers them `VSS_1..3`/`VDD_1..3`. Same pins, same function.
- The F103 datasheet used is **Rev 1 (preliminary)** — see `Documents/README.md`.
  A released package's pinout does not change between datasheet revisions
  (it would break every existing design), so this is sound. If you want
  belt-and-braces, spot-check pins 32/33/34/37 against the current Rev 20.
- This verifies **pin assignment only**. Electrical differences remain — most
  importantly `R5`, the 1.5 kΩ D+ pull-up the F103 needs and the L103 doesn't.